Using a dsPIC30F4011 to generating 4 PWM signals with equal duty cycles but at 90 degree phase increments

In a recent comment on one of my blog posts, Saptarshi De posed an interesting problem: How can the dsPIC30F4011 be used to generate four PWM signals of equal (but variable) duty cycle at 90 degree phase increments? Saptarshi wants to control a 4-phase interleaved boost converter and he supplied an illustration similar to the following to show what he requires:

The required PWM frequency is 50kHz and the four PWM signals must have equal duty cycle, but that duty cycle is variable. Saptarshi didn’t specify maximum and minimum values for the duty cycle, so I worked on the assumption that it can vary all the way from 0-100%.

At first, I was stumped. The most obvious approaches all have seemed to have show-stopping snags:

• The dsPIC30F PWM module does most of what’s needed, but sadly only provides three channels. Each channel has two outputs, so it may somehow be possible to coax two of the channels to produce complementary output with appropriate deadtime to yield the required four PWM signals, but I couldn’t figure out how.
• The Output Compare module provides four channels which can be used to generate PWM signals, but each of those channels must use either Timer 2 or Timer 3 as its timebase, which imposes some major limitations.

Ultimately, I opted for a variation of the second approach above using the Output Compare channels. Unfortunately, my solution requires that two of the channels be inverted externally, for example using a CMOS logic IC. If the duty cycle range is more constrained, this can be avoided, but for arbitrary duty cycle anywhere between 0% and 100%, I couldn’t work out how to do it without externally inverting two of the signals.

My solution is very similar to what I did previously to generate two out of phase PWM signals having identical duty cycle.

My approach is as follows:

• The dsPIC uses the internal fast RC oscillator with 16x PLL multiplier so that it runs at 30 MIPS. Fcy = 30e6 and Tcy = 33.33ns.
• Timer 2 and Timer 3 are configured with the same period of 600 * Tcy = 20us.
• TMR2 is initialised to 150 and TMR3 is initialised to 0. The result is that when the timers are enabled, TMR2 leads TMR3 by a quarter cycle.
• PWM1 is obtained from OC1 which uses Timer 2 as its timebase.
• PWM2 is obtained from OC2 which uses Timer 3 as its timebase (lagging OC1 by 25% of a cycle).
• PWM3 is obtained by inverting OC3 which uses Timer 2 as its timebase. The pulses on OC3 become the gaps between the pulses in PWM3.
• PWM4 is obtained by inverting OC4 which uses Timer 3 as its timebase. The pulses on OC4 become the gaps between the pulses in PWM4.

//
// This dsPIC30F4011 example program generates four
// interleaved PWM signals to control a 4-phase
// interleaved boost circuit.
//
// Written by Ted Burke - last updated 5-3-2015
//

#include <xc.h>
#include <libpic30.h>

// Configuration settings
_FOSC(CSW_FSCM_OFF & FRC_PLL16); // Fosc=16x7.5MHz, Fcy=30MHz
_FWDT(WDT_OFF);                  // Watchdog timer off
_FBORPOR(MCLR_DIS);              // Disable reset pin

int main()
{
    // Configure RD0, RD1, RD2, RD3 as digital outputs.
    // (Not sure if this is required when Output Compare is used)
    TRISD = 0b1111111111110000;

    // Set period and duty cycle
    float dutycycle = 0.2;      // 20% duty cycle for this example
    int pulse, space, period;   // pulse width, space width, period
    period = 600;               // f_m = 30e6 / 600 = 50 kHz
    pulse = dutycycle * period; // width of PWM pulses
    space = period - pulse;     // gap between PWM pulses

    // Configure Timers 2 & 3
    PR2 = period - 1;      // Set Timer 2 period for 50kHz
    PR3 = period - 1;      // Set Timer 3 period for 50kHz
    T2CONbits.TCKPS = 0;   // 1:1 prescale
    T3CONbits.TCKPS = 0;   // 1:1 prescale
    TMR2 = period / 4;     // Timer 2 leads Timer 3 by 25% of period.
    TMR3 = 1;              // Timer 3 lags Timer 2 by 25% of period. Give it a "head start" of 1 because Timer3 is enabled just after Timer2

    // Select timer for each channel
    OC1CONbits.OCTSEL = 0; // OC1 driven by Timer 2
    OC2CONbits.OCTSEL = 1; // OC2 driven by Timer 3
    OC3CONbits.OCTSEL = 0; // OC3 driven by Timer 2
    OC4CONbits.OCTSEL = 1; // OC4 driven by Timer 3

    // Output continuous pulses on all OC channels
    OC1CONbits.OCM = 0b101;
    OC2CONbits.OCM = 0b101;
    OC3CONbits.OCM = 0b101;
    OC4CONbits.OCM = 0b101;

    // Set OC1 to output continuous pulses of the desired width.
    // The pulses are positioned midway through the TMR2 up-count.
    OC1R = space / 2;       // pulse start time
    OC1RS = OC1R + pulse;   // pulse end time

    // Set OC2 to output continuous pulses of the desired width.
    // The pulses are positioned midway through the TMR3 up-count.
    OC2R = space / 2;       // pulse start time
    OC2RS = OC2R + pulse;   // pulse end time

    // Set OC3 to output continuous pulses. These will be inverted
    // to become the gaps between the pulses and vice versa. The
    // width of these pulses is therefore set to the width of the
    // gap between the final pulses in PWM3.
    OC3R = pulse / 2;       // pulse start time (start of gap in PWM3)
    OC3RS = OC3R + space;   // pulse end time (end of gap in PWM3)

    // Set OC4 to output continuous pulses. These will be inverted
    // to become the gaps between the pulses and vice versa. The
    // width of these pulses is therefore set to the width of the
    // gap between the final pulses in PWM4.
    OC4R = pulse / 2;       // pulse start time (start of gap in PWM4)
    OC4RS = OC4R + space;   // pulse end time (end of gap in PWM4)

    // Enable Timers 2 & 3
    //
    // It might be better to use some inline assembly language here
    // to ensure that the delay between the two timers being enabled
    // is very short and that we know exactly how many instruction
    // cycles "head start" Timer 3 should get to make the two timers
    // exactly 90 degrees out of phase.
    //
    T2CONbits.TON = 1; // Enable Timer 2
    T3CONbits.TON = 1; // Enable Timer 3

    // Now just let the Output Compare module to the work
    while(1);

    return 0;
}

I saved the program as “main.c” and compiled it using Microchip’s free XC16 C compiler, with the following simple build script:

xc16-gcc main.c -mcpu=30F4011 -Wl,--script=p30F4011.gld
if errorlevel 0 xc16-bin2hex a.out

My test circuit is shown below:

I didn’t have an inverter IC available when I was doing this test, so I just cobbled together a couple of crappy NPN transistor inverters (I used BC237 transistors). These don’t respond fast enough for the system to work at 50 kHz, so I temporarily reduced the dsPIC clock speed by a factor of 4 for this experiment.

I tested the circuit using a two channel digital oscilloscope, so I wasn’t able to view all four signals simultaneously. Instead, I displayed PWM1 on scope channel 2 (the blue signal in each of the photos below) and then used scope channel 1 to view PWM2, PWM3 and PWM4 one at a time so that I could verify the phase shift of each signal relative to PWM1.

The photo below shows the signals PWM1 (blue) and PWM2 (yellow).

The photo below shows the signals PWM1 (blue) and PWM3 (yellow). Note that PWM3 is obtained by inverting the signal from OC3.

The photo below shows the signals PWM1 (blue) and PWM4 (yellow). Note that PWM4 is obtained by inverting the signal from OC4.